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1/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. automotive series serial eeproms 125 spi bus ics br25 family br25h -wc series description br25h -wc series is a serial eeprom of spi bus interface method. features 1) high speed clock action up to 5mhz (max.) 2) wait function by holdb terminal. 3) part or whole of memory arrays settable as read only memory area by program. 4) 2.5 5.5v single power source action most suitable for battery use. 5) page write mode useful for initia l value write at factory shipment. 6) highly reliable connection by au pad and au wire. 7) for spi bus interface (cpol, cpha)=(0, 0), (1, 1) 8) auto erase and auto end function at data rewrite. 9) low current consumption at write action (5v) : 1.5ma (typ.) at read action (5v) : 1.0ma (typ.) at standby action (5v) : 0.1 a (typ.) 10) address auto increment function at read action 11) write mistake prevention function write prohibition at power on. write prohibition by command code (wrdi). write prohibition by wpb pin. write prohibition block setting by status registers (bp1, bp0) write mistake prevention function at low voltage. 12) sop8, sop-j8, tssop-b8 package 13) data at shipment memory array: ffh, status register wpen, bp1, bp0 : 0 14) data kept for 40 years. 15) data rewrite up to 1,000,000times. page write number of pages 16 byte 32 byte product number br25h010-wc br25h020-wc br25h040-wc br25h080-wc BR25H160-WC br25h320-wc br25h series capacity bit format type power sour ce voltage sop8 sop-j8 tssop-b8 1kbit 1288 br25h010-wc 2.5~5.5v 2kbit 2568 br25h020-wc 2.5~5.5v 4kbit 5128 br25h040-wc 2.5~5.5v 8kbit 1k8 br25h080-wc 2.5~5.5v 16kbit 2k8 BR25H160-WC 2.5~5.5v 32kbit 4kx8 br25h320-wc 2.5~5.5v no.10001edt01
technical note br25h -wc series 2/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. absolute maximum ratings (ta=25c) parameter symbol limits unit impressed voltage vcc -0.3~+6.5 v permissible dissipation pd 560(sop8) *1 mw 560(sop-j8) *2 410(tssop-b8) *3 storage temperature range tstg -65~+150 c operating temperature ra nge topr -40~+125 c terminal voltage - -0.3~vcc+0.3 v ? when using at ta=25 or higher, 4.5mw (*1,*2), 3.3mw(*3) to be reduced per 1 memory cell characteristics (vcc=2.5v 5.5v) parameter limits unit condition min. typ. max. number of data rewrite times *1 1,000,000 - - times ta 85c 500,000 - - times ta 105c 300,000 - - times ta 125c data hold years *1 40 - - years ta 25c 20 - - years ta 85c *1:not 100% tested recommended action conditions parameter symbol limits unit power source voltage vcc 2.5 ~ 5.5 v input voltage vin 0~vcc input / output capacity (ta=25c, frequency=5mhz) parameter symbol cond itions min max unit input capacity *1 c in v in =gnd - 8 pf output capacity *1 c out v out =gnd - 8 *1: not 100% tested
technical note br25h -wc series 3/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. electrical characteristics (unless otherwis e specified, ta=-40~+125c, vcc=2.5~5.5v) parameter symbol limits unit conditions min. typ. max. ?h? input voltage vih 0.7xvcc - vcc +0.3 v 2.5 Q vcc Q 5.5v ?l? input voltage vil -0.3 - 0.3x vcc v 2.5 Q vcc Q 5.5v ?l? output voltage vol 0 - 0.4 v iol=2.1ma ?h? output voltage voh vcc-0.5 - vcc v ioh=-0.4ma input leak current ili -10 - 10 a v in =0~vcc output leak current ilo -10 - 10 a v out =0~vcc, csb=vcc current consumption at write action icc1 - - 2.0 ma vcc=2.5v,fsck=5mhz, te/w=5ms vih/vil=0.9vcc/0.1vcc, so=open byte write, page write write status register icc2 - - 3.0 ma vcc=5.5v,fsck=5mhz, te/w=5ms vih/vil=0.9vcc/0.1vcc, so=open byte write, page write write status register current consumption at read action icc3 - - 1.5 ma vcc=2.5v,fsck=5mhz vih/vil=0.9vcc/0.1vcc, so=open read, read status register icc4 - - 2.0 ma vcc=5.5v,fsck=5mhz vih/vil=0.9vcc/0.1vcc, so=open read, read status register standby current isb - - 10 a vcc=5.5v csb=holdb=wpb=vcc, sck=si=vcc or =gnd, so=open *radiation resistance design is not made block diagram pin assignment and description terminal name input/output function vcc - power source to be connected gnd - all input / output reference voltage, 0v csb input chip select input sck input serial clock input si input start bit, ope code, address, and serial data input so output serial data output holdb input hold input command communications may be suspended temporarily (hold status) wpb input write protect input write command is prohibited *1 write status register command is prohibited. so instruction decode control clock generation voltage detection write inhibition high voltage generator instruction register 1 32k eeprom address register data register address decoder read/write amp 8bit 8bit status register csb sck holdb 7 12bit *1 7 12bit *1 wpb si fig.1 block diagram *1 7bit: br25h010-wc 8bit: br25h020-wc 9bit: br25h040-wc 10bit: br25h080-wc 11bit: BR25H160-WC 12bit: br25h320-wc vcc holdb sck si csb so wpb gnd br25h010-wc br25h020-wc br25h040-wc br25h080-wc BR25H160-WC br25h320-wc fig.2 pin assignment diagram *1:br25h010/020/040-wc
technical note br25h -wc series 4/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. operating timing characteristics sync data input / output timing (ta=-40~+125c, unless otherwise specified, load capacity cl1=100pf) parameter symbol 2.5 vcc 5.5v unit min. typ. max. sck frequency f sck - - 5 mhz sck high time t sckwh 85 - - ns sck low time t sckwl 85 - - ns csb high time t cs 85 - - ns csb setup time t css 90 - - ns csb hold time t csh 85 - - ns sck setup time t scks 90 - - ns sck hold time t sckh 90 - - ns si setup time t dis 20 - - ns si hold time t dih 30 - - ns data output delay time1 t pd1 - - 70 ns data output delay time2 (c l2 =30pf) t pd2 - - 55 ns output hold time t oh 0 - - ns output disable time t oz - - 100 ns holdb setting setup time t hfs 0 - - ns holdb setting hold time t hfh 40 - - ns holdb release setup time t hrs 0 - - ns holdb release hold time t hrh 70 - - ns time from holdb to output high-z t hoz - - 100 ns time from holdb to output change t hpd - - 70 ns sck rise time *1 t rc - - 1 s sck fall time *1 t fc - - 1 s output rise time *1 t ro - - 50 ns output fall time *1 t fo - - 50 ns write time t e/w - - 5 ms *1 not 100% tested ac measurement conditions parameter symbol limits unit min. typ. max. load capacity 1 c l1 - - 100 pf load capacity 2 c l2 - - 30 pf input rise time - - - 50 ns input fall time - - - 50 ns input voltage - 0.2vcc/0.8vcc v input / output judgment vo ltage - 0.3vcc/0.7vcc v fig.3 input timing csb sck si so tcs tcss tscks tsckwl tsckwh tdis tdih trc tfc high-z si is taken into ic inside in sync with data rise edge of sck. input address and data from the most significant bit msb. csb sck si so tpd toh tro,tfo toz tcsh tsckh tcs hi g h-z csb sck si n+1 "h" "l" n dn n-1 dn dn-1 holdb so dn+1 thfs thfh thoz thrs thrh tdis thpd high-z fig.4 input / output timing fig.5 hold timing so is output in sync with data fall edge of sck. data is output from the most significant bit msb.
technical note br25h -wc series 5/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. characteristic data (the following characteristic data are typ. value.) 0 0.5 1 1.5 2 2.5 0123456 vcc[v] icc3,4(read)[ma] spec fsck=5mhz data=aah spec ta=-40 ta=25 ta=125 0 2 4 6 8 10 12 0123456 vcc[v] isb[a] spec ta=-40 ta=25 ta=125 0 2 4 6 8 10 12 0123456 vcc[v] ili[a] spec ta=-40 ta=25 ta=125 0 20 40 60 80 100 0123456 vcc[v] tcss[ns] spec ta=-40 ta=25 ta=125 0.1 1 10 100 0123456 vcc[v] fsck[mhz] spec ta=-40 ta=25 ta=125 0 20 40 60 80 100 0123456 vcc[v] tcsh[ns] spec ta=-40 ta=25 ta=125 0 20 40 60 80 100 0123456 vcc[v] tsckwh [ns] spec ta=-40 ta=25 ta=125 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 2.6 0 0.4 0.8 1.2 ioh[ma] voh[v] spec ta=-40 ta=25 ta=125 0 2 4 6 8 10 12 0123456 vout[v] ilo[a] spec ta=-40 ta=25 ta=125 0 1 2 3 4 0123456 vcc[v] icc1,2[ma]] spec fsck=5mhz data=00h spec ta=-40 ta=25 ta=125 0 1 2 3 4 5 6 0123456 vcc[v] vih[v] spec ta=-40 ta=25 ta=125 0 0.2 0.4 0.6 0.8 1 0123456 iol[ma] vol[v] spec ta=-40 ta=25 ta=125 fig.8 "l" output voltage vol-iol(vcc=2.5v) 0 1 2 3 4 5 6 0123456 vcc[v] vil[v] ta=-40 ta=25 ta=125 fig.9 "h" output voltage voh-ioh(vcc=2.5v) fig.10 input leak current ili(csb,sck,si,holdb,wpb) fig.11 output leak current ilo(so)(vcc=5.5v) fig.12 current consumption at write operation icc1 , 2 fig.13 consumption current at read operation icc3 , 4 fig.14 consumption current at standby operation isb fig.15 sck frequency fsck fig.16 sck high time tsckwh 0 20 40 60 80 100 0123456 vcc[v] tsckwl [ns] spec ta=-40 ta=25 ta=125 fig.17 sck low time tsckwl 0 20 40 60 80 100 0123456 vcc[v] tcs[ns] spec ta=-40 ta=25 ta=125 fig.18 csb high time tcs fig.19 csb setup time tcss fig.20 csb hold time tcsh spec fig.6 "h" input voltage vih(csb,sck,si,holdb,wpb) fig.7 "l" input voltage vil(csb,sck,si,holdb,wpb)
technical note br25h -wc series 6/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. characteristic data (the following characteristic data are typ. value.) 0 10 20 30 40 50 0123456 vcc[v] tdih[ns] s pe c ta=-40 ta=25 ta=125 0 20 40 60 80 100 0123456 vcc[v] tpd1 [ns] spec ta=-40 ta=25 ta=125 0 20 40 60 80 100 0123456 vcc[v] tro [ns] spec ta=-40 ta=25 ta=125 -20 0 20 40 60 80 0123456 vcc[v] thpd [ns] spec ta=-40 ta=25 ta=125 0 20 40 60 80 100 120 0123456 vcc[v] thoz [ns] spec ta=-40 ta=25 ta=125 -20 0 20 40 60 80 0123456 vcc[v] thrh [ns] spec ta=-40 ta=25 ta=125 0 20 40 60 80 100 0123456 vcc[v] tfo [ns] spec ta=-40 ta=25 ta=125 -20 0 20 40 60 80 0123456 vcc[v] thfh [ns] spec ta=-40 ta=25 ta=125 0 2 4 6 8 0123456 vcc[v] te/w[ms] spec ta=-40 ta=25 ta=125 0 20 40 60 80 100 0123456 vcc[v] tpd2 [ns] spec ta=-40 ta=25 ta=125 fig.21 si setup time tdis fig.22 si hold time tdih fig.23 data output delay time tpd1(cl=100pf) fig.24 data output delay time tpd2(cl-30pf) 0 20 40 60 80 100 120 0123456 vcc[v] toz [ns] s pe c ta=-40 ta=25 ta=125 fig.25 output disable time toz fig.26 holdb setting hold time thfh fig.27 holdb release hold time thrh fig.28 time from holdb to output high-z thoz fig.29 time from holdb to output change thpd fig.30 output rise time tro fig.31 output fall time tfo fig.32 write cycle time te/w -20 -10 0 10 20 30 0123456 vcc[v] tdis[ns] spec ta=-40 ta=25 ta=125
technical note br25h -wc series 7/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. features status registers this ic has status registers. the status register s are of 8 bits and express the following parameters. bp0 and bp1 can be set by write status register command. t hese 2 bits are memorized into the eeprom, therefore are valid even when power source is turned off. rewrite characteristics and data hold time ar e same as characteristics of the eeprom. wen can be set by write enable command and write disable command. wen becomes write disable status when power source is turned off. r/b is for write conf irmation, therefore cannot be set externally. the value of status register can be read by read status command. status registers product number bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 br25h010-wc 1 1 1 1 bp1 bp0 wen r D /b br25h020-wc br25h040-wc br25h080-wc wpen 0 0 0 bp1 bp0 wen r D /b BR25H160-WC br25h320-wc bit memory location function contents wpen eeprom wpb pin enable / disable designation bit wpen=0=invalid wpen=1=valid this enables / disables the functions of wpb pin. bp1 bp0 eeprom eeprom write disable block designation bit this designates the write disable area of eeprom. write designation areas of product numbers are shown below. wen register write and write status register write enable / disable status confirmation bit wen=0=prohibited wen=1=permitted r D /b register write cycle status (ready / busy) status confirmation bit r/b=0=ready r/b=1=busy write disable block setting bp1 bp0 write disable block br25h010-wc br25h020-wc br25h040-wc br25h080-wc BR25H160-WC br25h320-wc 0 0 none none none none none none 0 1 60h-7fh c0h-ffh 180h-1ffh 300 h-3ffh 600h-7ffh c00h-fffh 1 0 40h-7fh 80h-ffh 100h-1ffh 200 h-3ffh 400h-7ffh 800h-fffh 1 1 00h-7fh 00h-ffh 000h-1ffh 000 h-3ffh 000h-7ffh 000h-fffh wpb pin by setting wpb=low, write command is prohibited. as fo r br25h080/160/320-wc, only when wpen bit is set ?1?, the wpb pin functions become valid. and the write command to be disabled at this moment is wrsr. as for br25h010/ 020/040-wc, both write and wrsr commands are prohibited. however, when write cycle is in execution, no interruption can be made. product number wrsr write br25h010-wc prohibition possible prohibition possible br25h020-wc br25h040-wc br25h080-wc prohibition possible but wpen bit ?1? prohibition impossible BR25H160-WC br25h320-wc holdb pin by holdb pin, data transfer can be interrupted. when sck=?0?, by making holdb from ?1 ? into?0?, data transfer to eeprom is interrupted. when sck = ?0?, by making holdb from ?0? into ?1?, data transfer is restarted.
technical note br25h -wc series 8/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. command mode command contents ope code br25h010-wc br25h020-wc br25h040-wc br25h080-wc BR25H160-WC br25h320-wc wren write enable write enable command 0000 *110 0000 *110 0000 0110 wrdi write disable write disable command 0000 *100 0000 *100 0000 0100 read read read command 0000 *011 0000 a 8 011 0000 0011 write write write command 0000 *010 0000 a 8 010 0000 0010 rdsr read status register status register read command 0000 *101 0000 *101 0000 0101 wrsr write status register st atus register write command 0000 *001 0000 *001 0000 0001 *=don?t care bit. timing chart 1. write enable (wren) / disable (wrdi) cycle this ic has write enable status and write disable status. it is set to write enable status by write enable command, and it is set to write disable status by write disable co mmand. as for these commands, set csb low, and then input the respective ope codes. the respective commands accept comm and at the 7-th clock rise. even with input over 7 clocks, command becomes valid. when to carry out write and write status register command, it is necessary to set write enable status by the write enable command. if write or write status register command is input in the write disable status, comm ands are cancelled. and even in the write enable status, once write an d write status register command is execut ed, it gets in the write disable status. after power on, this ic is in write disable status. wren (write enable): write enable fig.33 write enable command fig.34 write disable wrdi (write disable): write disable *1 br25h010/020/040-wc= don?t care br25h080/160/320-wc= ?0? input *1 br25h010/020/040-wc= don?t care br25h080/160/320-wc= ?0? input high-z 6 03 7 12 45 csb sck so si 0000*1110 high-z 00 0 0 si *1 1 0 0 03 12 4 7 csb sck 5 6 so
technical note br25h -wc series 9/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. 2. read command (read) product number address length br25h010-wc a6-a0 br25h020-wc a7-a0 br25h040-wc a8-a0 productnumber address length br25h080-wc a9-a0 BR25H160-WC a10-a0 br25h320-wc a11-a0 by read command, data of eeprom can be read. as for this command, set csb low, then input address after read ope code. eeprom starts data output of t he designated address. data output is started from sck fall of 15/23 *1 clock, and from d7 to d0 sequentially. this ic has increment read functi on. after output of data for 1 byte (8bits), by continuing input of sck, data of the next address can be read. increment read can read all the addresses of eeprom. after reading data of the most significant address, by continuing increment read, data of t he most insignificant address is read. 3. write command (write) product number address length br25h010-wc a6-a0 br25h020-wc a7-a0 br25h040-wc a8-a0 product number address length br25h080-wc a9-a0 BR25H160-WC a10-a0 br25h320-wc a11-a0 by write command, data of eeprom can be written. as for this command, set csb low, then input address and data after write ope code. then, by making csb high, the eeprom st arts writing. the write time of eeprom requires time of te/w (max 5ms). during te/w, other than status read command is not accepted. start csb after taking the last data (d0), and before the next sck clock starts. at other timing, wr ite command is not executed, and this write command is cancelled. this ic has page write function, and after input of data for 1 byte (8 bits), by continuing data input without starting csb, data up to 16/32 *1 bytes can be written for one te/w. in page write, the insignificant 4/5 *2 bit of the designated address is incremented internally at every time when data of 1 byte is input and data is written to respective addresses. when data of the maximum bytes or higher is input, addres s rolls over, and previously input data is overwritten. *1 br25h010/020/040-wc=16 bytes at maximum br25h080/160/320-wc=32 bytes at maximum * 2 br25h010/020/040-wc=insignificant 4 bits br25h080/160/320-wc=insignificant 5 bits high-z 12 1 1 0 0 3 7 1 2 d6 so csb sck si 4 5 a 11 6 8 a 0 a 1 d7 23 30 24 d0 0 0 0 0 0 d2 d1 high-z 1 1 0 0 3 7 1 2 d6 so csb sck si 4 5 a 4 6 8 a7 a 0 a 1 d7 15 22 16 d0 0 0 0 0 1 d2 d1 9 10 11 a6 a5 * 1 br25h010/020-wc=don?t care br25h040-wc=a8 fig.35 read command (br25h010/020/040-wc) fig.36 read command (br25h080/160/320-wc) high-z 23 d0 0 0 0 0 1 d2 d1 d7 15 22 16 d6 0 a0 a1 1 1 2 4 0 csb sck si so 0 3 7 8 5 6 a4 a5 a6 a7 *1 br25h010/020-wc=don?t care br25h040-wc=a8 fig.37 write command (br25h010/020/040-wc) fig.38 write command (br25h080/160/320-wc) *=don?t care high-z =don't care 31 d0 0 0 0 0 0 d2 d1 d7 23 30 24 d6 0 a0 a1 1 1 2 4 0 csb sck si so 0 3 7 8 5 6 a11 12 *1 br25h010/020/040-wc=15 clocks br25h080/160/320-wc=23 clocks
technical note br25h -wc series 10/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. 4. status register write / read command write status register command can writ e status register data. the data can be written by this command are 2 bits * 1 , that is, bp1 (bit3) and bp0 (bit2) among 8 bits of status register. by bp1 and bp0, write disable block of eeprom can be set. as for this command, set csb low, and input ope code of write st atus register, and input data. then, by making csb high, eeprom starts writing. write time requires time of te/w as same as write. as fo r csb rise, start csb after taking the last data bit (bit0), and before the next sck clock starts. at ot her timing, command is cancelled. write disable block is determined by bp1 and bp0, and the block can be selected from 1/4 of memory array, 1/2, and entire memory array. (refer to the write disable block setting table.) to the write disabled block, write cannot be made, and only read can be made. *1 3bits including br25h080/160/320-wc wpen (bit7) csb sck high-z =don't care 0 0 0 0 1 0 1 2 4 0 si so 0 3 7 8 5 6 9 10 11 12 13 14 15 bp1 bp0 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 csb sck high-z =don't care 0 0 0 0 1 wpen 0 1 2 4 0 si so 0 3 7 8 5 6 9 10 11 12 13 14 15 bp1 bp0 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 0 fig.39 status register writ e command (br25h010/020/040-wc) fig.40 status register writ e command (br25h080/160/320-wc) high-z bit7 bit6 bit5 bit4 1 1 bp0 1 bp1 bit3 bit2 bit1 bit0 13 csb sck si 1 1 10 6 0 so 14 1 2 wen r/b 11 15 3 7 9 0 5 12 0 0 0 0 4 8 1 =don?t care high-z bit7 bit6 bit5 bit4 0 0 bp0 0 bp1 bit3 bit2 bit1 bit0 13 csb sck si 1 1 10 6 0 so 14 1 2 wen r/b 11 15 3 7 9 0 5 12 0 0 0 0 0 4 8 wpen fig.41 status register read command (br25h010/020/040-wc) fig.42 status register read command (br25h080/160/320-wc)
technical note br25h -wc series 11/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. at standby current at standby set csb ?h?, and be sure to set sck, s i, wpb, holdb input ?l? or ?h?. do not input intermediate electric potantial. timing as shown in fig.43, at standby, when sck is ?h?, even if csb is fallen, si status is not read at fall edge. si status is read at sck rise edge after fall of csb. at standby and at power on/off, set csb ?h? status. wpb cancel valid area wpb is normally fixed to ?h? or ?l? for use, but when wpb is c ontrolled so as to cancel write status register command and write command, pay attention to the following wpb valid timing. while write or write status register command is executed, by setting wpb = ?l? in cancel valid area, command can be cancelled. the area from command ope code before csb rise at internal automatic wr ite start becomes the cancel valid area. however, once write is started, any input cannot be cancelled. wpb input becomes don?t care, and cancellation becomes invalid. holdb pin by holdb pin, command communication can be stopped tempor arily (hold status). the holdb pin carries out command communications normally when it is high. to get in hold status, at command communication, when sck=low, set the holdb pin low. at hold status, sck and si become don?t care, and so becomes high impedance (high-z). to release the hold status, set the holdb pin high when sck=low. after that, communication can be restarted from the point before the hold status. for example, wh en hold status is made after a5 address input at read, after release of hold status, by starting a4 address input, read can be restarted. when in hold status, leave csb low. when it is set csb=high in hold status, the ic is reset, therefore communication after that cannot be restarted. 0 1 2 command start here. si is read. even if csb is fallen at sck=si=?h?, si status is not read at that edge. csb sck si fig.43 operating timing fig.44 wpb valid timing (wrsr) fig.45 wpb valid timing (write) 6 7 ope code data te/w data write time sck 15 16 valid (wen is reset by wpb=l) invalid invalid valid invalid (br25h010/020/040-wc) (br25h080/160/320-wc) 6 7 ope code data te/w data write time sck 15/23 24/32 valid (wen is reset by wpb=l) invalid invalid invalid invalid (br25h010/020/040-wc) (br25h080/160/320-wc) 8 *2 address invalid *1 br25h010/020/040-wc = 15 br25h080/160/320-wc = 23 *2 br25h010/020/040-wc = 24 br25h080/160/320-wc = 32 *1
technical note br25h -wc series 12/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. method to cancel each command read ? method to cancel : cancel by csb = ?h? rdsr ? method to cancel : cancel by csb = ?h? write page write a ope code, address input area. cancellation is available by csb=?h? b data input area (d7~d1 input area) cancellation is available by csb=?h? c data input area (d0 area) when csb is started, write starts. after csb rise, cancellation cannot be made by any means. d te/w area. cancellation is available by csb = ?h?. however, when write starts (csb is started) in the area c, cancellation cannot be made by any means. and by inputting on sck clock, cancellation cannot be made. in page write mode, there is write enabl e area at every 8 clocks. note 1) if vcc is made off during write execution, designated address data is not guaranteed, therefore write it once again. note 2) if csb is started at the same timing as that of the sck rise, write execution / cancel becomes unstable, therefore, it is recommended to fall in sck = ?l? area. as for sck rise, assu re timing of tcss / tcsh or higher. wrsr a from ope code to 15 rise. cancel by csb =?h?. b from 15 clock rise to 16 clock rise (write enable area). when csb is started, write starts. after csb rise, cancellation cannot be made by any means. c after 16 clock rise. cancel by csb=?h?. however, when write starts (csb is started) in the area b, cancellation cannot be made by any means. and, by inputting on sck clock, cancellation cannot be made. note 1) if vcc is made off during write execution, designated address data is not guaranteed, therefore write it once again note 2) if csb is started at the same timing as that of the sck rise, write execution / cancel becomes unstable, therefore, it is recommended to fall in sck = ?l? area. as for sck rise, assure ti ming of tcss / tcsh or higher. wren/wrdi a from ope code to 7-th clock rise, cancel by csb = ?h?. b cancellation is not available when csb is started after 7-th clock. ope code address cancel available in all areas of read mode data 8 bits 8 bits/16bits 8 bits fig.46 read cancel valid timing ope code cancel available in all areas of rdsr mode data 8 bits 8 bits fig.47 rdsr cancel valid timing ope code address a data te/w b d c 8bits 8bits/16bits 8bits d7 b d6 d5 d4 d3 d2 d1 d0 sck si c ope code data te/w 8 bits 14 15 16 17 d1 d0 a b c 8 bits a b c sck si ope code 8 bits 7 8 9 a b sck fig.49 wrsr cancel valid timing fig.50 wren/wrdi cancel valid timing fig.48 write cancel valid timing
technical note br25h -wc series 13/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. high speed operation in order to realize stable high speed operations, pay a ttention to the following input / output pin conditions. input pin pull up, pull down resistance when to attach pull up, pull down resistance to eeprom inpu t pin, select an appropriate value for the microcontroller vol, iol from vil characteristics of this ic. pull up resistance and, in order to prevent malfunction, mistake writ e at power on/off, be sure to make csb pull up. pull down resistance further, by amplitude vihe, vile of signal input to eeprom , operation speed changes. by inputting signal of amplitude of vcc / gnd level to input, more stable high speed operations can be realized. on the contrary, when amplitude of 0.8vcc / 0.2vcc is input, operation speed becomes slow. *1 in order to realize more stable high speed operat ion, it is recommended to make the values of r pu , r pd as large as possible, and make the amplitude of signal input to eeprom close to the amplitude of vcc / gnd level. ( 1 at this moment, operating timi ng guaranteed value is guaranteed.) i olm v ile v olm ?l? output ?l? input microcontroller eeprom r pu fig.51 pull up resistance r pu 5-0.4 210 -3 r pu 2.3[k ? ] r pu v cc -v olm i olm ??? v olm v ile ??? with the value of rpu to sa tisfy the above equation, v olm becomes 0.4v or lower, and with v ile (=1.5v), the equation is also satisfied. ? v ile :eeprom v il specifications ? v olm :microcontroller v ol specifications ? i olm :microcontroller i ol specifications i ohm v ihe v ohm microcontroller eeprom ?h? output ?h? input r pd fig.52 pull down resistance r pd v ohm i ohm ??? v ohm v ihe ??? example) when v cc =5v, v ohm =v cc -0.5v, i ohm 0.4ma, v ihe =v cc 0.7v, from the equation , r pd 5-0.5 0.410 -3 r pu 11.3[k ? ] example) when vcc=5v, v ile =1.5v, v olm =0.4v, i olm =2ma, from the equation ,
technical note br25h -wc series 14/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. so load capacity condition load capacity of so output pin affects upon delay characterist ic of so output. (data output delay time, time from holdb to high-z) in order to make output delay characteristic into higher speed, make so load capacity small. in concrete, ?do not connect many devices to so bus?, ?make the wire between the controller and eeprom short?, and so forth. other cautions make the wire length from the microcontroller to eeprom i nput signal same length, in order to prevent setup / hold violation to eeprom, owing to difference of wire length of each input. eeprom so cl fig.53 vil dependency of data output delay time tpd fig.54 so load dependency of data output delay time tpd tpd_vil characteristics 0 10 20 30 40 50 60 70 80 0 0.2 0.4 0.6 0.8 1 vil[v] tpd[ns] vcc= 2.5v ta=25 vih=vcc c l =100pf spe c tpd-cl characteristics 20 30 40 50 60 70 80 0 20 40 60 80 100 120 cl[pf] tpd[ns] vcc=2.5v ta=25 vih/vil=0.8vcc/0.2vcc spe c spe c
technical note br25h -wc series 15/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. equivalent circuit output circuit input circuit oeint. so fig.55 so output equivalent circuit csb reset int. fig.56 csb input equivalent circuit sck si holdb wpb fig.57 sck input equivalent circuit fig.58 si input equivalent circuit fig.59 holdb input equivalent circuit fig.60 wpb input equivalent circuit
technical note br25h -wc series 16/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. notes on power on/off at power on/off, set csb ?h? (=vcc). when csb is ?l?, this ic gets in input accept status (active) . if power is turned on in this status, noises and the likes may cause malfunction, mistake write or so. to prevent these, at power on, set csb ?h ?. (when csb is in ?h? status, all inputs are canceled.) (good example) csb terminal is pulled up to vcc. at power off, take 10ms or higher before supply. if power is turned on without observing this condition, the ic internal circuit may not be reset, which please note. (bad example) csb terminal is ?l? at power on/off. in this case, csb always becomes ?l? (active status), and eeprom may have malfunction, mistake write owing to noises and the likes. even when csb input is high-z, the status becomes like this case, which please note. lvcc circuit lvcc (vcc-lockout) circuit prevents data rewrite acti on at low power, and prevents wrong write. at lvcc voltage (typ. =1.9v) or below, it prevent data rewrite. p.o.r. circuit this ic has a por (power on reset) circuit as mistake writ e countermeasure. after por acti on, it gets in write disable status. the por circuit is valid only when power is on, and does not work when power is off. when power is on, if the recommended conditions of the following tr, toff, and vbot are not satisfied, it may become write enable status owing to noises and the likes. recommended conditions of t r , t off , vbot t r t off v bot 10ms or below 10ms or higher 0.3v or below 100ms or below 10ms or higher 0.2v or below fig.61 csb timing at power on/off tr toff vbot 0 vcc fig.62 rise waveform gnd csb bad example vcc gnd vcc vcc good exam p le
technical note br25h -wc series 17/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. noise countermeasures vcc noise (bypass capacitor) when noise or surge gets in the power source line, malf unction may occur, therefore, for removing these, it is recommended to attach a bypass capacitor (0.1 f) between ic vcc and gnd. at that mo ment, attach it as close to ic as possible.and, it is also recommended to attach a bypass capacitor between board vcc and gnd. sck noise when the rise time (tr) of sck is long, and a certain degree or more of noise exists, malfunction may occur owing to clock bit displacement. to avoid this, a schmitt trigger circuit is built in sck input. the hysterisis width of this circuit is set a bout 0.2v, if noises exist at sck input, set t he noise amplitude 0.2vp-p or below. and it is recommended to set the rise time (tr) of sck 100ns or below. in the case when the rise time is 100ns or higher, take sufficient noise countermeasures. make the clock rise, fall time as small as possible. wpb noise during execution of write status regist er command, if there exist noises on wpb pi n, mistake in recognition may occur and forcible cancellation may result, which please note. to avoid th is, a schmitt trigger circuit is built in wpb input. in the sam e manner, a schmitt trigger circuit is built in csb input, si input and holdb input too. note of use (1) described numeric values and data are design repres entative values, and the values are not guaranteed. (2) we believe that application circuit examples are recomm endable, however, in actual use, confirm characteristics further sufficiently. in the case of use by changing the fixed nu mber of external parts, make your decision with sufficient margin in consideration of static char acteristics and transition characteristics and fluctuations of external parts and our lsi. (3) absolute maximum ratings if the absolute maximum ratings such as impressed voltage and operating temperature range and so forth are exceeded, lsi may be destructed. do not impress voltage and temperatur e exceeding the absolute maximum ratings. in the case of fear exceeding the absolute maximum ratings, take physical sa fety countermeasures such as fuses, and see to it that conditions exceeding the absolute maximum ratings should not be impressed to lsi. (4) gnd electric potential set the voltage of gnd terminal lowest at any action condition. make sure that eac h terminal voltage is higher than that of gnd terminal. (5) heat design in consideration of permissible dissipation in actual use condition, carry out heat design with sufficient margin. (6) terminal to terminal short circuit and wrong packaging when to package lsi onto a board, pay sufficient attent ion to lsi direction and displacement. wrong packaging may destruct lsi. and in the case of short circuit between ls i terminals and terminals and power source, terminal and gnd owing to foreign matter, lsi may be destructed. (7) use in a strong electromagnetic field may cause malfunction, therefore, ev aluate design sufficiently.
technical note br25h -wc series 18/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. ordering part number b r 2 5 h 0 1 0 f - w c e 2 rohm type bus type operating capacity package type double cell packaging and forming 25 spi temperature 010= 1k f : sop8 specification h:-40 +125 020= 2k fj : sop-j8 e2: embossed tape and reel 040= 4k fvt :tssop-b8 080= 8k 160=16k 320=32k (unit : mm) sop8 0.9 0.15 0.3min 4 + 6 ? 4 0.17 +0.1 - 0.05 0.595 6 4 3 8 2 5 1 7 5.0 0.2 6.2 0.3 4.4 0.2 (max 5.35 include burr) 1.27 0.11 0.42 0.1 1.5 0.1 s ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2500pcs e2 () direction of feed reel 1pin ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2500pcs e2 () direction of feed reel 1pin (unit : mm) sop-j8 4 + 6 ? 4 0.2 0.1 0.45min 234 5 6 7 8 1 4.9 0.2 0.545 3.9 0.2 6.0 0.3 (max 5.25 include burr) 0.42 0.1 1.27 0.175 1.375 0.1 0.1 s s
technical note br25h -wc series 19/19 www.rohm.com 2010.08 - rev.d ? 2010 rohm co., ltd. all rights reserved. (unit : mm) tssop-b8 0.08 s 0.08 m 4 4 234 8765 1 1.0 0.05 1pin mark 0.525 0.245 +0.05 ?0.04 0.65 0.145 +0.05 ?0.03 0.1 0.05 1.2max 3.0 0.1 4.4 0.1 6.4 0.2 0.5 0.15 1.0 0.2 (max 3.35 include burr) s direction of feed reel ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 3000pcs e2 () 1pin
r1010 a www.rohm.com ? 2010 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the products. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redunda ncy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospac e machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

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